This invention relates to format varying computing.
A program counter indicates an address of the next instruction to be executed by a computer processor. Processing in traditional computers involves linear program counters, i.e., instructions are loaded for execution in a linear fashion, one instruction at a time. Processing in parallel computer architectures involve multiple linear program counters that are inter-connected at a level above a linear processing level. Thus, traditional computers process each step of a program in a straight, linear fashion. Parallel processors operate in this manner and are frequently limited to a finite number of simultaneous operations at any one time.
In an aspect, the invention features a format varying computing system including a computer linked to a display and input device, the computer including memory devices linked to a processing unit and a set of counters residing in the processing unit and linked to the memory devices, the set of counters defining a symbol residing in the memory devices.
One or more of the following features may also be included. The set of counters may include a format varying counter, a data pointer counter and a process counter. The symbol represents a location in one of the memory devices. The memory device may be a diskette drive, hard drive, CD-ROM drive, random access memory, and so forth.
In another aspect, the invention features a format-varying computer including a display and input device linked to a processing unit and a set of counters residing in the processing unit and linked to a plurality of memory devices.
One or more of the following features may also be included. The set of counters include a number of format varying counters, data pointer counters and process counters. The computer may further include memory locations, each one of the memory locations represented by a symbol. Each symbol may be represented by one of the format varying counters, one of the data pointer counters, and one of the process counters. The set of counters may represent multiple simultaneous processes occurring simultaneously in the processing unit.
Embodiments of the invention may have one or more of the following advantages.
The system replaces traditional linear program counters with numerous process counters and/or numerous format and data pointer counters, combining multiple sets of relatively simple operations that perform a designated task to perform complex operations.
Multiple counters for format, multiple counters for data pointers, and multiple counters for processing change linear programming computing to n-dimensional computing, thus providing a computer system with the capability of implementing any process or similar set of processes multiple times simultaneously.
When simultaneous processes are being performed in the system, the results of one process are stored in the same place where the operation took place, a location that may be represented by, for example, a number and a letter that is known to a user. By storing the results of a process in a known location, i.e., the same place the operation took place, more processes are understandable to the user.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.